Towards Highly Parallel Event Processing Through Reconfigurable Hardware

Mohammad Sadoghi, Harshvardhan Pratap Singh, and Hans-Arno Jacobsen.

In The 7th International Workshop on Data Management on New Hardware (DaMoN, co-located with SIGMOD), pages 27-32, June 2011.


We present fpga-ToPSS (Toronto Publish/Subscribe System), an efficient event processing platform to support high-frequency and low-latency event matching. fpga-ToPSS is built over reconfigurable hardware---FPGAs---to achieve line-rate processing by exploring various degrees of parallelism. Further\-more, each of our proposed FPGA-based designs is geared towards a unique application requirement, such as flexibility, adaptability, scalability, or pure performance, such that each solution is specifically optimized to attain a high level of parallelism. Therefore, each solution is formulated as a design trade-off between the degree of parallelism versus the desired application requirement. More\-over, our event processing engine supports Boolean expression matching with an expressive predicate language applicable to a wide range of applications including real-time data analysis, algorithmic trading, targeted advertisement, and (complex) event processing.


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Tags: content-based publish/subscribe, content-based matching, fpga

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